Intel Architecture Day 2018 and the Future of Silicon

Intel dropped a great deal of data at its Architecture , covering a huge variety of products and designs in a variety of markets. AI inference workloads, FPGA improvements, iGPU performance increases, 3D chip-stacking technology like Foveros — all of these were major topics of consideration. It’s been a long time since Intel held a sweeping set of disclosures like this, and while we’re absolutely going to keep talking about the tech Intel is bringing to market, I want to spend some time on the story “behind” the tech.

When I interviewed Mark Bohr, Intel’s director of process architecture and integration, back in 2012, he emphasized that Intel’s technology and process leadership were the result of hard lessons the company had learned over the decades. The company’s “Copy Exactly” strategy was itself a response to fab yield issues a decade and more earlier. One of the fundamental differences between TSMC and Intel is that because Intel is its own customer and accounts for the vast majority of its own business, it can couple its CPU designs to its process nodes in ways that make no sense for a client fab with dozens of different customers to satisfy.

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But this tight linkage between CPU design and process node characteristics intrinsically assumes that Intel will be able to continue executing on time. If nodes are delayed, the introduction of the CPU features that were designed for those nodes will also be delayed. And because features were tightly tied to the new process design, backporting them to an older node, while absolutely possible, isn’t trivial.

When 10nm began to hit delays, Intel had to make a choice. Should it push forward but keep its original feature sizes and targets, attempt to leap ahead with an aggressive node definition, or backport features it had originally intended to use on 10nm for 14nm instead? It chose the second option and answered the consumer market’s desire for faster Skylake-class CPUs by adding cores and tweaking its existing 14nm process to improve high-end performance.

The bet on Skylake’s scalability paid off; Coffee Lake has been a very well-received family in both and mobile. The bet on 10nm, of course, has not. But according to Intel, one of the major changes at the company over the past few years has been a greater emphasis on creating a more flexible strategy that will prevent the company’s features from being “process locked.”

While we don’t know all of the particulars, the general theme was that the company’s development model, which had worked exceptionally well for years, ran into problems and needed to be fixed. Those fixes have been or are being implemented and we’ll see the results of them by this time next year.

Intel Isn’t Idle

Intel’s 2018 can be summarized in three words: Spectre, Meltdown, 10nm. Slightly smaller stories record earnings on the strength of strong server demand and kicking Brian Krzanich out the door. With Chipzilla largely quiet about its own product plans and AMD firing on all thrusters, it’s common to see people arguing that Intel’s business is on the verge of collapse thanks to some combination of AMD, ARM, Qualcomm, and TSMC.

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There is truth to this argument. It would be exceptionally stupid for Intel to ignore a newly resurgent competitor or the rapid improvement in ARM-based silicon. Process node leadership may not be a silver bullet for performance leadership, but it still matters. But when you step back and take a larger view of Intel’s business, it’s no longer possible to argue that the company is ignoring anything. EMIB and Foveros could be transformative projects for chip-stacking in the . Sunny Cove silicon is coming. Gen 11 graphics are a major advance over Gen 9.  And, of course, Intel is working on its own discrete GPU architecture, with plans to launch in 2020. Its heterogeneous Atom + Core CPU with integrated POP memory with 2mW standby power is a remarkable achievement in its own right.

Framing the company’s efforts solely in terms of Intel versus AMD misses a huge amount of the work Intel is practically doing to improve CPU, GPU, FPGA, and interconnect performance in a huge range of scenarios. Projects like MESO, while in their infancy, offer the tantalizing prospect of a return to something approaching “classic” Moore’s Law/Dennard scaling.

If I had to summarize the overall tenor of the event, I’d say Intel presented itself as a company fully aware of the mistakes it has made, with a number of projects under development intended to resolve that problem, combined with a new set of operating parameters to make such issues less likely to occur in the future. Now, with all of this said, it’s still going to be nearly a year before Sunny Cove CPUs ship. Qualcomm and AMD aren’t standing still. But new markets are opening in AI/ML, IoT, and self-driving cars. Intel is working to fix its process and ship new CPUs with better graphics, but it’s also tackling the package integration that we once identified as the third major phase of Moore’s law.

It is not unfair to take a wait-and-see approach to these Intel disclosures, especially given the company’s problems with 10nm and the fact that Sunny Cove still isn’t expected on store shelves for a year. 2019 will be the first time in decades that Intel faces off against a competitor building on a more advanced node than it has deployed itself. Given that Chipzilla has well over 90 percent of the server market and somewhere between 90-95 percent of mobile, it’s going to lose some market share in these spaces. Intel’s tech day didn’t change my perception of the challenges the company will face in 2019. What it did suggest was that the company is more comprehensively positioned for 2020 than many might have thought.

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